The present invention relates to a reference voltage generation circuit for driving a group of driven elements such as, for example, an array of light emitting diodes (LEDs) disposed in an electro-photography printer as a light source, an array of heating resistors disposed in a thermal printer, and an array of display units disposed in a display device. The present invention also relates to a drive circuit including the reference voltage generation circuit; a light emitting diode (LED) head including the drive circuit; and an image forming apparatus including the light emitting diode (LED) head.
In the specification, a light emitting diode may be referred to as an LED; a monolithic integrated circuit may be referred to as an IC (Integrated Circuit); an n-channel MOS (Metal Oxide Semiconductor) transistor may be referred to as an NMOS; and a p-channel MOS transistor may be referred to as a PMOS.
Further, a signal terminal and a signal input to or output from the signal terminal may be designated with a same reference designation. A static latent image formed on a photosensitive drum according to each of light emitting elements, or a toner image after development or transferred to a printing medium may be referred to as a dot. Each of the light emitting elements corresponding to the dot also may be referred to as a dot.
An LED head is a generic nomenclature of a unit in which a light emitting element and a drive element thereof are disposed. When the LED head is disposed only in a printer device, the LED head is referred to as an LED print head. In the following description, a group of driven elements is an array of LEDs used in an electro-photography printer as an example.
In a conventional image forming apparatus such as an electro-photography printer, a photosensitive drum charged is selectively irradiated according to print information, thereby forming a static latent image thereon. Then, toner is attached to the static latent image to form a toner image. Afterward, the toner image is transferred to a sheet, so that the toner image is developed. An LED is used as a light source. An LED head used in the conventional printer is formed of an LED array chip having a plurality of LED elements and a driver IC for driving the LED array chip.
The LED head includes a reference voltage generation circuit for generating a reference voltage, so that a drive current for driving the LED elements is determined based on the reference voltage generated from the reference voltage generation circuit and a resistor disposed in the driver IC. The resistor is produced through a semiconductor process technology. In general, the resistor is formed of poly-silicon or an impurity diffused resistor, and is integrated in the driver IC in a form of monolithic.
Patent Reference has disclosed such a conventional electro-photography printer. In the conventional electro-photography printer, the LED elements have light emission power having temperature dependence with a negative temperature coefficient. Accordingly, when a junction temperature of the LED array chip increases, the light emission power decreases. For example, when the LED is formed of an AlGaAs element, the temperature coefficient is −0.25%/° C. When a temperature increases upon the LED light emission, the light emission power decreases significantly. Patent Reference: Japanese Patent Publication No. 10-332494
As described above, the driver IC of the LED elements is disposed in the LED head. Accordingly, it is preferable that the temperature coefficient of the LED drive current value becomes positive, thereby compensating the negative temperature coefficient of the LED light emission power. The LED drive current value is determined based on the resistor disposed in the IC driver and the value of the voltage output from the reference voltage generation circuit. Accordingly, considering a temperature coefficient of the resistor (generally positive value), it is necessary to provide the voltage output from the reference voltage generation circuit with a positive temperature coefficient.
As described above, even when the temperature varies upon the LED drive, it is necessary to maintain the light emission power at a specific level. To this end, it is necessary to provide a drive method for compensating the temperature dependence of the light emission power of the LED elements. Patent Reference has disclosed a circuit having such a temperature compensation circuit as explained below.
FIG. 22 is a circuit diagram showing a drive circuit of the LED head of the conventional printer. FIG. 23 is a circuit diagram showing a conventional reference voltage generation circuit 37 disclosed in Patent Reference. More specifically, FIG. 22 is a circuit diagram showing a main portion of the driver IC. FIG. 22 shows a connection relationship between the LED drive circuit and a peripheral circuit thereof, and one LED element (one dot) is shown in FIG. 22.
As shown in FIG. 22, the LED drive circuit includes a pre-buffer circuit G1 indicated with a hidden line, and the pre-buffer circuit G1 is formed of an AND circuit 42, a PMOS transistor 43, and an NMOS transistor 44. Further, the LED drive circuit includes an inverter circuit G0, a latch circuit LT1, and a control voltage generation circuit 36 indicated with a projected line. The control voltage generation circuit 36 is disposed per one driver IC chip.
A operational amplifier 51 outputs a voltage Vcont (control potential) to an LED drive transistor Tr1 for adjusting a drive current of an LED element LD1. Further, the LED drive circuit includes a resistor 53 having a resistivity of Rref, and a PMOS transistor 52 having a gate length the same as that of the LED drive transistor Tr1.
A reference voltage input terminal VREF is connected to an reverse input terminal of the operational amplifier 51, so that a reference voltage Vref generated at the reference voltage generation circuit (described later) is input. The operational amplifier 51, the PMOS transistor 52, and the resistor 53 constitute a feedback control circuit. A current Iref flowing through the resistor 53, that is, the PMOS transistor 52, is not depended on a power source voltage VDD, and is determined only by the reference voltage Vref and the resistivity Rref of the resistor 53.
The operational amplifier 51 controls such that a potential of the reverse input terminal thereof becomes equal to a potential of a non-reverse input terminal thereof. Accordingly, the current Iref flowing through the resistor 53 is given by:Iref=Vref/Rref
As described above, it is configured such that the PMOS transistor 52 has the gate length the same as that of the LED drive transistor Tr1. A gate potential thereof becomes equal to the voltage Vcont upon driving the LED element. Accordingly, the PMOS transistor 52 and the LED drive transistor Tr1 operate in a saturated region, and have a current-mirror relationship.
As a result, a drive current value of the LED element LD1 is proportional to the current Iref flowing through the resistor 53, and the current Iref is proportional to the reference voltage Vref input into the VREF terminal. Accordingly, it is possible to collectively adjust the LED drive current according to the reference voltage Vref.
FIG. 23 is a circuit diagram showing the conventional reference voltage generation circuit 37 for generating the reference voltage Vref.
As shown in FIG. 23, PMOS transistor M1, M2, and M3 with a same size have source terminals connected to the power source VDD and gate terminals connected to each other, thereby constituting a current-mirror circuit. A drain terminal of the PMOS transistor M1 is connected to a collector terminal of an NPN bipolar transistor Q1 through resistor 60 and 61 connected in series. The NPN bipolar transistor Q1 has an emitter terminal connected to ground and a base terminal connected to a connection point of the resistors 60 and 61.
A drain terminal of the PMOS transistor M2 of the current-mirror circuit is connected to a collector terminal of an NPN bipolar transistor Q2. The NPN bipolar transistor Q2 has an emitter terminal connected to ground and a base terminal connected to the collector terminal of the NPN bipolar transistor Q1. A drain terminal of the PMOS transistor M3 is connected to ground through a resistor 62.
The NPN bipolar transistor Q2 has an emitter area N times larger than an emitter area of the NPN bipolar transistor Q1 (N>1). A connection point of the drain terminal of the PMOS transistor M3 and the resistor 62 becomes an output terminal of the conventional reference voltage generation circuit 37 for outputting the reference voltage Vref.
As disclosed in Patent Reference, the conventional reference voltage generation circuit 37 shown in FIG. 23 generates an output voltage having a positive temperature coefficient. As shown in FIG. 23, the resistors 60, 61, and 62 have resistivities of R0, R1, and R2, respectively.
In the conventional reference voltage generation circuit 37 shown in FIG. 23, it is assumed as follows:
A base current is negligibly small relative to a collector current of the bipolar transistor. In other words, a current amplification ratio of the transistor is smaller than one. The collector current of the bipolar transistor is independent of a voltage between the collector terminal and the emitter terminal thereof. In other words, an early voltage of the bipolar transistor has a sufficiently large property.
Base on the assumptions described above, the output voltage Vref of the conventional reference voltage generation circuit 37 is given by:Vref=(R2/R1)×(kT/q)ln(N)Where k is the Boltzmann constant, T is an absolute temperature, q is a charge of electron, and ln represents natural legalism.
It is supposed that a temperature coefficient Tc of the output voltage Vref is defined by:Tc=(1/Vref)×(ΔVref/ΔT)
Accordingly, the temperature coefficient Tc of the output voltage Vref is given by 1/T, and becomes about +0.33%/° C. at a room temperature (about 300° K.).
In the LED element formed of a GaAlAs element and used in the LED head, the temperature dependence of the light emission power is about −0.25%/° C. A temperature dependence of a reference resistor 53 (refer to FIG. 23) disposed in the IC driver formed through a CMOS process is about +0.1%/° C.
A temperature of the LED element is about the same as a temperature of the IC driver arranged adjacent to the LED element. Further, the LED elements and the conventional reference voltage generation circuit 37 may be arranged on a ground wiring portion formed on a print circuit board, so that each of the LED elements has a similar temperature.
Accordingly, in order to compensate the reduction in the light emission power upon an increase in the temperature of the LED elements, it is suffice that the reference voltage Vref has the following temperature coefficient:−(−0.25−0.1)=+0.35%/° C.
The temperature coefficient thus obtained is about the same as the temperature coefficient of the conventional reference voltage generation circuit 37.
FIGS. 24(a) and 24(b) are graphs showing a property of the conventional reference voltage generation circuit 37. More specifically, FIG. 24(a) is a graph showing a relationship between the output voltage Vref and the power source voltage VDD, and FIG. 24(b) is a graph showing a relationship between a power source voltage dependence of the output voltage Vref and the power source voltage VDD.
As shown in FIG. 24(a), the output voltage Vref is established when the power source voltage VDD becomes grater than 2 V (VDD >2 V). Further, the output voltage Vref increases when the power source voltage VDD increases. In FIG. 24(b), the power source voltage dependence of the output voltage Vref is defined by:1/Vref×(ΔVref/ΔVDD)×100 (%/V)
As shown in FIG. 24(b), the output voltage Vref shows the power source voltage dependence of about 2%/° C. at the power source voltage VDD of 5 V. When the power source voltage VDD decreases upon driving the LED elements, the output voltage Vref decreases, thereby reducing the drive current of the LED elements. As disclosed in Patent Reference, the bipolar transistor has a small early voltage. Accordingly, as shown in FIG. 24(b), the output voltage Vref is dependent on the power source voltage VDD and varies.
When the power source voltage VDD increases, a gate potential of the PMOS transistor M2 (refer to FIG. 23) increases for maintaining a drain current thereof at a specific level. Accordingly, a collector potential of the bipolar transistor Q2 increases. When the bipolar transistor Q2 has a sufficiently large early voltage, the increase in the collector current becomes negligibly small, thereby maintaining a current value flowing through the bipolar transistor Q2 at a specific level.
In an actual case, the bipolar transistor Q2 does not have a sufficiently large early voltage. Accordingly, when the collector potential of the bipolar transistor Q2 increases, the collector current thereof also increases. Further, when the collector current of the bipolar transistor Q2 increases, a drain current of the PMOS transistor M2 increases. As a result, a drain current of the PMOS transistor M3 having the current-mirror relationship with the PMOS transistor M2 increases, thereby increasing the output voltage Vref.
As described above, it is preferred that the bipolar transistor Q2 has a sufficiently large early voltage. However, the bipolar transistor Q2 is produced concurrently when a semiconductor IC having a CMOS structure is produced. Accordingly, it is difficult to specifically adjust the property of the bipolar transistor Q2.
FIG. 25 is a circuit diagram showing another conventional reference voltage generation circuit 38.
As shown in FIG. 25, PMOS transistor M4, M5, and M6 with a same size have source terminals connected to the power source VDD and gate terminals connected to each other, thereby constituting a current-mirror circuit. A drain terminal of the PMOS transistor M4 is connected to a collector terminal and a base terminal of an NPN bipolar transistor Q3. The NPN bipolar transistor Q3 has an emitter connected to ground.
A drain terminal of the PMOS transistor M5 is connected to a base terminal and a collector terminal of an NPN bipolar transistor Q4 through a resistor 63. The NPN bipolar transistor Q4 has an emitter terminal connected to ground. The NPN bipolar transistor Q4 has an emitter area N times larger than an emitter area of the NPN bipolar transistor Q3 (N>1).
A drain terminal of the PMOS transistor M6 is connected to ground through a resistor 64. A connection point of the drain terminal of the PMOS transistor M6 and the resistor 64 becomes an output terminal of the conventional reference voltage generation circuit 38 for outputting the reference voltage Vref.
A reverse input terminal of a operational amplifier 61 is connected to a base terminal of the NPN bipolar transistor Q3, and a non-reverse input terminal thereof is connected to a drain terminal of the PMOS transistor M5. An output terminal of amplifier 61 is connected to gate terminals of the PMOS transistors M4 to M6. The resistors 63 and 64 have resistivities of R3 and R4, respectively.
In the conventional reference voltage generation circuit 38 shown in FIG. 25, when it is assumed that a collector current of the bipolar transistor is negligible relative to a base current, the output voltage Vref of the conventional reference voltage generation circuit 38 is given by:Vref=(R4/R3)×(kT/q)ln(N)
Where k is the Boltzmann constant, T is an absolute temperature, q is a charge of electron, and ln represents natural legalism.
It is supposed that the temperature coefficient Tc of the output voltage Vref is defined by:Tc=(1/Vref)×(ΔVref/ΔT)
Accordingly, the temperature coefficient Tc of the output voltage Vref is given by 1/T, and becomes about +0.33%/° C. at a room temperature (about 300° K.).
FIGS. 26(a) and 26(b) are graphs showing a property of the conventional reference voltage generation circuit 38. More specifically, FIG. 26(a) is a graph showing a relationship between the output voltage Vref and the power source voltage VDD, and FIG. 26(b) is a graph showing a relationship between a power source voltage dependence of the output voltage Vref and the power source voltage VDD.
As shown in FIG. 26(a), the output voltage Vref is established when the power source voltage VDD becomes grater than 2 V (VDD>2 V). Further, the output voltage Vref increases when the power source voltage VDD increases. In FIG. 24(b), the power source voltage dependence of the output voltage Vref is defined by:1/Vref×(ΔVref/ΔVDD)×100 (%/V)
As shown in FIG. 26(b), the output voltage Vref shows the power source voltage dependence of about 0.8%/° C. at the power source voltage VDD of 5 V. When the power source voltage VDD decreases upon driving the LED elements, the output voltage Vref decreases, thereby reducing the drive current of the LED elements.
As shown in FIG. 25, the conventional reference voltage generation circuit 38 is provided with the operational amplifier 65 for controlling an output terminal potential thereof, so that a terminal potential of the non-reverse input terminal becomes substantially equal to that of the reverse input terminal. In an actual case, however, due to a variance in a semiconductor production process and the likes, a small offset voltage is generated between the non-reverse input terminal and the reverse input terminal of the operational amplifier 65.
When a small offset voltage is generated, the output voltage Vref (refer to FIGS. 26(a) and 26(b)) is shifted from an ideal state. Accordingly, when the offset voltage varies due to a variance in a semiconductor production process and the likes, the output voltage Vref varies, thereby causing a problem.
FIG. 27 is a graph showing a relationship between the output voltage Vref and the offset voltage. In FIG. 27, the horizontal axis represents the offset voltage of the operational amplifier 65, and the vertical axis represents the output voltage Vref.
As shown in FIG. 27, when the offset voltage is merely a few mV, the output voltage Vref varies significantly. Accordingly, it is necessary to reduce a variance in a semiconductor production process for maintaining a specific reference voltage. As a result, it is difficult to obtain a high production yield for the drive IC, thereby increasing a production cost thereof, and eventually a production cost of the LED head and the printer.
In the LED head, even though the temperature varies associated with the LED rive, it is necessary to maintain the light emission power at a specific level. Accordingly, it is necessary to provide a driving method capable of compensating the temperature dependence of the light emission power of the LED elements.
In the conventional reference voltage generation circuit 37 shown in FIG. 23, it is possible to maintain the specific temperature coefficient through obtaining a value proportional to the absolute temperature as the output voltage. However, the output voltage has the power source voltage dependence of about 2%/V at the power source voltage of 5 V. Accordingly, when the power source voltage decreases upon the LED drive, the output voltage Vref decreases, thereby decreasing the LED drive current. As a result, the light emission power decreases and exposure energy to the photosensitive drum of the printer decreases, thereby reducing a print density.
In the conventional reference voltage generation circuit 38 shown in FIG. 25, the output voltage has the power source voltage dependence of about 0.8%/V at the power source voltage of 5 V, thereby showing somehow improvement from the conventional reference voltage generation circuit 37 shown in FIG. 23, but not sufficient.
Besides, the conventional reference voltage generation circuit 38 shown in FIG. 25 is provided with the operational amplifier 65, thereby inevitably generating the offset voltage of the operational amplifier 65. Accordingly, even when the offset voltage of a few mV is generated, the output voltage Vref significantly varies. As a result, the semiconductor production process needs to have high accuracy. Consequently, the production yield of the drive IC decreases, thereby increasing the production cost of the drive IC, and eventually the production cost of the LED head and the printer.
In view of the problems described above, an object of the present invention is to provide a reference voltage generation circuit capable of solving the problems of the conventional drive circuit. Another object of the present invention is to provide a drive circuit, a print head, and an image forming apparatus having the reference voltage generation circuit.
The reference voltage generation circuit of the present invention is provided for compensating a negative temperature dependence of light emission power of an LED element and a temperature dependence of a reference resistor in a driver IC. The reference voltage generation circuit of the present invention does not vary significantly relative to a change in a power source voltage, and has a minimized influence against a variance in semiconductor production process.
Further objects and advantages of the invention will be apparent from the following description of the invention.